From: Haojian Zhuang <haojian.zhuang@linaro.org>
Date: Mon, 29 Jan 2018 03:42:42 +0000 (+0800)
Subject: hikey: clean dcache for SRAM after initialized
X-Git-Url: http://git.openwrt.org/%22https:/collectd.org//%22/%22https:/collectd.org/%22?a=commitdiff_plain;h=a9b3021e145c7174f08465e88e6aba65a4099fdf;p=project%2Fbcm63xx%2Fatf.git

hikey: clean dcache for SRAM after initialized

Although SRAM is initialized, DCACHE should be cleaned too.
Because MCU is a parrallel core to access SRAM. We need to make
sure that initialized value is really written to SRAM before
MCU using it.

Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
---

diff --git a/plat/hisilicon/hikey/hikey_bl2_setup.c b/plat/hisilicon/hikey/hikey_bl2_setup.c
index 810f6aaa..6080f84f 100644
--- a/plat/hisilicon/hikey/hikey_bl2_setup.c
+++ b/plat/hisilicon/hikey/hikey_bl2_setup.c
@@ -276,6 +276,7 @@ void bl2_early_platform_setup(meminfo_t *mem_layout)
 
 	/* Clear SRAM since it'll be used by MCU right now. */
 	memset((void *)SRAM_BASE, 0, SRAM_SIZE);
+	clean_dcache_range(SRAM_BASE, SRAM_SIZE);
 
 	sp804_timer_init(SP804_TIMER0_BASE, 10, 192);
 	dsb();